Fraunhofer RISC-V安全元素成功后加速安全芯片开发Silicon验证

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Home » Fraunhofer RISC-V Secure Element Accelerates Secure Chip Development After Successful Silicon Validation The Fraunhofer RISC-V Secure Element is now available as a licensable security platform for custom systems-on-chip (SoCs), application-specific integrated circuits (ASICs), and chiplets. The silicon prototype has successfully completed functional validation. Based on this verified hardware foundation, companies can shorten development cycles, reduce technical risk, and implement “security by design” more effectively at the semiconductor level. Following successful functional validation of the silicon prototype, the technology is now entering the technology transfer phase: Fraunhofer is making its OpenTitan-based Secure Element implementation available as licensable intellectual property (IP), complemented by integration support and collaborative development opportunities. Companies can use the Secure Element as a complete solution or as individual IP blocks and integrate the technology into their own SoC, ASIC, or chiplet designs. The verified security architecture reduces development effort and helps accelerate the development of secure, regulatory-compliant hardware solutions designed for long-term availability. The platform integrates key security functions directly into the chip, including a hardware root of trust, secure boot, secure key storage, device identity management, authentication, and secure firmware updates. It also helps companies address regulatory requirements, such as those introduced by the Cyber Resilience Act, early in the hardware design process. Future development efforts will focus on the integration of additional sensor capabilities. Direct integration into custom SoCs, ASICs, and chiplets reduces external attack surface, decreases board space and component count, and enables targeted optimization of security functions in terms of performance, silicon area, and power consumption. As a result, the platform is particularly well suited for security-critical applications in fields such as industrial automation, medical technology, communications, energy infrastructure, IoT, and edge computing. Like the previously developed security chip , the newly available platform is based on OpenTitan and a RISC-V architecture. While the security chip is the physical hardware component, the platform comprises the complete implementation, including firmware integration components. It supports both conventional and post-quantum cryptography and was manufactured using GlobalFoundries’ 22 nm FD-SOI technology in Dresden. The European development and manufacturing supply chain provides transparency and strengthens trust in the underlying hardware. Companies interested in licensing, integration support, or a joint development project can find further information at www.iis.fraunhofer.de/secure-elements-and-accelerators . The Fraunhofer RISC-V Secure Element platform was developed within the framework of the Trusted Electronic Bayern (TrEB) Center through a collaboration between the Fraunhofer Institute for Applied and Integrated Security AISEC , the Fraunhofer Institute for Electronic Microsystems and Solid State Technologies EMFT, and the Fraunhofer Institute for Integrated Circuits IIS. The TrEB Center was funded by the Bavarian State Ministry of Economic Affairs, Regional Development and Energy and by the European Union through the European Regional Development Fund (ERDF). Shannon, writes, edits and produces Semiconductor Digest’s news articles, email newsletters, blogs, webcasts, and social media posts. She holds a bachelor’s degree in journalism from Huntington University in Huntington, IN. In addition to her years of freelance business reporting, Shannon has also worked in marketing and public relations in the renewable energy and healthcare industries.